extractedLnx/linux-2.6.38/drivers/scsi/atp870u.c_is885.c
static void is885(struct atp_unit *dev, unsigned int wkport,unsigned char c)
{
unsigned int tmport;
unsigned char i, j, k, rmb, n, lvdmode;
unsigned short int m;
static unsigned char mbuf[512];
static unsigned char satn[9] = {0, 0, 0, 0, 0, 0, 0, 6, 6};
static unsigned char inqd[9] = {0x12, 0, 0, 0, 0x24, 0, 0, 0x24, 6};
static unsigned char synn[6] = {0x80, 1, 3, 1, 0x19, 0x0e};
unsigned char synu[6] = {0x80, 1, 3, 1, 0x0a, 0x0e};
static unsigned char synw[6] = {0x80, 1, 3, 1, 0x19, 0x0e};
unsigned char synuw[6] = {0x80, 1, 3, 1, 0x0a, 0x0e};
static unsigned char wide[6] = {0x80, 1, 2, 3, 1, 0};
static unsigned char u3[9] = { 0x80,1,6,4,0x09,00,0x0e,0x01,0x02 };
lvdmode=inb(wkport + 0x1b) >> 7;
for (i = 0; i < 16; i++) {
m = 1;
m = m << i;
if ((m & dev->active_id[c]) != 0) {
continue;
}
if (i == dev->host_id[c]) {
printk(KERN_INFO " ID: %2d Host Adapter\n", dev->host_id[c]);
continue;
}
tmport = wkport + 0x1b;
outb(0x01, tmport);
tmport = wkport + 0x01;
outb(0x08, tmport++);
outb(0x7f, tmport++);
outb(satn[0], tmport++);
outb(satn[1], tmport++);
outb(satn[2], tmport++);
outb(satn[3], tmport++);
outb(satn[4], tmport++);
outb(satn[5], tmport++);
tmport += 0x06;
outb(0, tmport);
tmport += 0x02;
outb(dev->id[c][i].devsp, tmport++);
outb(0, tmport++);
outb(satn[6], tmport++);
outb(satn[7], tmport++);
j = i;
if ((j & 0x08) != 0) {
j = (j & 0x07) | 0x40;
}
outb(j, tmport);
tmport += 0x03;
outb(satn[8], tmport);
tmport += 0x07;
while ((inb(tmport) & 0x80) == 0x00)
cpu_relax();
tmport -= 0x08;
if ((inb(tmport) != 0x11) && (inb(tmport) != 0x8e)) {
continue;
}
while (inb(tmport) != 0x8e)
cpu_relax();
dev->active_id[c] |= m;
tmport = wkport + 0x10;
outb(0x30, tmport);
tmport = wkport + 0x14;
outb(0x00, tmport);
phase_cmd:
tmport = wkport + 0x18;
outb(0x08, tmport);
tmport += 0x07;
while ((inb(tmport) & 0x80) == 0x00)
cpu_relax();
tmport -= 0x08;
j = inb(tmport);
if (j != 0x16) {
tmport = wkport + 0x10;
outb(0x41, tmport);
goto phase_cmd;
}
sel_ok:
tmport = wkport + 0x03;
outb(inqd[0], tmport++);
outb(inqd[1], tmport++);
outb(inqd[2], tmport++);
outb(inqd[3], tmport++);
outb(inqd[4], tmport++);
outb(inqd[5], tmport);
tmport += 0x07;
outb(0, tmport);
tmport += 0x02;
outb(dev->id[c][i].devsp, tmport++);
outb(0, tmport++);
outb(inqd[6], tmport++);
outb(inqd[7], tmport++);
tmport += 0x03;
outb(inqd[8], tmport);
tmport += 0x07;
while ((inb(tmport) & 0x80) == 0x00)
cpu_relax();
tmport -= 0x08;
if ((inb(tmport) != 0x11) && (inb(tmport) != 0x8e)) {
continue;
}
while (inb(tmport) != 0x8e)
cpu_relax();
tmport = wkport + 0x1b;
outb(0x00, tmport);
tmport = wkport + 0x18;
outb(0x08, tmport);
tmport += 0x07;
j = 0;
rd_inq_data:
k = inb(tmport);
if ((k & 0x01) != 0) {
tmport -= 0x06;
mbuf[j++] = inb(tmport);
tmport += 0x06;
goto rd_inq_data;
}
if ((k & 0x80) == 0) {
goto rd_inq_data;
}
tmport -= 0x08;
j = inb(tmport);
if (j == 0x16) {
goto inq_ok;
}
tmport = wkport + 0x10;
outb(0x46, tmport);
tmport += 0x02;
outb(0, tmport++);
outb(0, tmport++);
outb(0, tmport++);
tmport += 0x03;
outb(0x08, tmport);
tmport += 0x07;
while ((inb(tmport) & 0x80) == 0x00)
cpu_relax();
tmport -= 0x08;
if (inb(tmport) != 0x16) {
goto sel_ok;
}
inq_ok:
mbuf[36] = 0;
printk( KERN_INFO" ID: %2d %s\n", i, &mbuf[8]);
dev->id[c][i].devtype = mbuf[0];
rmb = mbuf[1];
n = mbuf[7];
if ((mbuf[7] & 0x60) == 0) {
goto not_wide;
}
if ((i < 8) && ((dev->global_map[c] & 0x20) == 0)) {
goto not_wide;
}
if (lvdmode == 0) {
goto chg_wide;
}
if (dev->sp[c][i] != 0x04) { // force u2
goto chg_wide;
}
tmport = wkport + 0x1b;
outb(0x01, tmport);
tmport = wkport + 0x03;
outb(satn[0], tmport++);
outb(satn[1], tmport++);
outb(satn[2], tmport++);
outb(satn[3], tmport++);
outb(satn[4], tmport++);
outb(satn[5], tmport++);
tmport += 0x06;
outb(0, tmport);
tmport += 0x02;
outb(dev->id[c][i].devsp, tmport++);
outb(0, tmport++);
outb(satn[6], tmport++);
outb(satn[7], tmport++);
tmport += 0x03;
outb(satn[8], tmport);
tmport += 0x07;
while ((inb(tmport) & 0x80) == 0x00)
cpu_relax();
tmport -= 0x08;
if ((inb(tmport) != 0x11) && (inb(tmport) != 0x8e)) {
continue;
}
while (inb(tmport) != 0x8e)
cpu_relax();
try_u3:
j = 0;
tmport = wkport + 0x14;
outb(0x09, tmport);
tmport += 0x04;
outb(0x20, tmport);
tmport += 0x07;
while ((inb(tmport) & 0x80) == 0) {
if ((inb(tmport) & 0x01) != 0) {
tmport -= 0x06;
outb(u3[j++], tmport);
tmport += 0x06;
}
cpu_relax();
}
tmport -= 0x08;
while ((inb(tmport) & 0x80) == 0x00)
cpu_relax();
j = inb(tmport) & 0x0f;
if (j == 0x0f) {
goto u3p_in;
}
if (j == 0x0a) {
goto u3p_cmd;
}
if (j == 0x0e) {
goto try_u3;
}
continue;
u3p_out:
tmport = wkport + 0x18;
outb(0x20, tmport);
tmport += 0x07;
while ((inb(tmport) & 0x80) == 0) {
if ((inb(tmport) & 0x01) != 0) {
tmport -= 0x06;
outb(0, tmport);
tmport += 0x06;
}
cpu_relax();
}
tmport -= 0x08;
j = inb(tmport) & 0x0f;
if (j == 0x0f) {
goto u3p_in;
}
if (j == 0x0a) {
goto u3p_cmd;
}
if (j == 0x0e) {
goto u3p_out;
}
continue;
u3p_in:
tmport = wkport + 0x14;
outb(0x09, tmport);
tmport += 0x04;
outb(0x20, tmport);
tmport += 0x07;
k = 0;
u3p_in1:
j = inb(tmport);
if ((j & 0x01) != 0) {
tmport -= 0x06;
mbuf[k++] = inb(tmport);
tmport += 0x06;
goto u3p_in1;
}
if ((j & 0x80) == 0x00) {
goto u3p_in1;
}
tmport -= 0x08;
j = inb(tmport) & 0x0f;
if (j == 0x0f) {
goto u3p_in;
}
if (j == 0x0a) {
goto u3p_cmd;
}
if (j == 0x0e) {
goto u3p_out;
}
continue;
u3p_cmd:
tmport = wkport + 0x10;
outb(0x30, tmport);
tmport = wkport + 0x14;
outb(0x00, tmport);
tmport += 0x04;
outb(0x08, tmport);
tmport += 0x07;
while ((inb(tmport) & 0x80) == 0x00);
tmport -= 0x08;
j = inb(tmport);
if (j != 0x16) {
if (j == 0x4e) {
goto u3p_out;
}
continue;
}
if (mbuf[0] != 0x01) {
goto chg_wide;
}
if (mbuf[1] != 0x06) {
goto chg_wide;
}
if (mbuf[2] != 0x04) {
goto chg_wide;
}
if (mbuf[3] == 0x09) {
m = 1;
m = m << i;
dev->wide_id[c] |= m;
dev->id[c][i].devsp = 0xce;
#ifdef ED_DBGP
printk("dev->id[%2d][%2d].devsp = %2x\n",c,i,dev->id[c][i].devsp);
#endif
continue;
}
chg_wide:
tmport = wkport + 0x1b;
outb(0x01, tmport);
tmport = wkport + 0x03;
outb(satn[0], tmport++);
outb(satn[1], tmport++);
outb(satn[2], tmport++);
outb(satn[3], tmport++);
outb(satn[4], tmport++);
outb(satn[5], tmport++);
tmport += 0x06;
outb(0, tmport);
tmport += 0x02;
outb(dev->id[c][i].devsp, tmport++);
outb(0, tmport++);
outb(satn[6], tmport++);
outb(satn[7], tmport++);
tmport += 0x03;
outb(satn[8], tmport);
tmport += 0x07;
while ((inb(tmport) & 0x80) == 0x00)
cpu_relax();
tmport -= 0x08;
if ((inb(tmport) != 0x11) && (inb(tmport) != 0x8e)) {
continue;
}
while (inb(tmport) != 0x8e)
cpu_relax();
try_wide:
j = 0;
tmport = wkport + 0x14;
outb(0x05, tmport);
tmport += 0x04;
outb(0x20, tmport);
tmport += 0x07;
while ((inb(tmport) & 0x80) == 0) {
if ((inb(tmport) & 0x01) != 0) {
tmport -= 0x06;
outb(wide[j++], tmport);
tmport += 0x06;
}
cpu_relax();
}
tmport -= 0x08;
while ((inb(tmport) & 0x80) == 0x00)
cpu_relax();
j = inb(tmport) & 0x0f;
if (j == 0x0f) {
goto widep_in;
}
if (j == 0x0a) {
goto widep_cmd;
}
if (j == 0x0e) {
goto try_wide;
}
continue;
widep_out:
tmport = wkport + 0x18;
outb(0x20, tmport);
tmport += 0x07;
while ((inb(tmport) & 0x80) == 0) {
if ((inb(tmport) & 0x01) != 0) {
tmport -= 0x06;
outb(0, tmport);
tmport += 0x06;
}
cpu_relax();
}
tmport -= 0x08;
j = inb(tmport) & 0x0f;
if (j == 0x0f) {
goto widep_in;
}
if (j == 0x0a) {
goto widep_cmd;
}
if (j == 0x0e) {
goto widep_out;
}
continue;
widep_in:
tmport = wkport + 0x14;
outb(0xff, tmport);
tmport += 0x04;
outb(0x20, tmport);
tmport += 0x07;
k = 0;
widep_in1:
j = inb(tmport);
if ((j & 0x01) != 0) {
tmport -= 0x06;
mbuf[k++] = inb(tmport);
tmport += 0x06;
goto widep_in1;
}
if ((j & 0x80) == 0x00) {
goto widep_in1;
}
tmport -= 0x08;
j = inb(tmport) & 0x0f;
if (j == 0x0f) {
goto widep_in;
}
if (j == 0x0a) {
goto widep_cmd;
}
if (j == 0x0e) {
goto widep_out;
}
continue;
widep_cmd:
tmport = wkport + 0x10;
outb(0x30, tmport);
tmport = wkport + 0x14;
outb(0x00, tmport);
tmport += 0x04;
outb(0x08, tmport);
tmport += 0x07;
while ((inb(tmport) & 0x80) == 0x00)
cpu_relax();
tmport -= 0x08;
j = inb(tmport);
if (j != 0x16) {
if (j == 0x4e) {
goto widep_out;
}
continue;
}
if (mbuf[0] != 0x01) {
goto not_wide;
}
if (mbuf[1] != 0x02) {
goto not_wide;
}
if (mbuf[2] != 0x03) {
goto not_wide;
}
if (mbuf[3] != 0x01) {
goto not_wide;
}
m = 1;
m = m << i;
dev->wide_id[c] |= m;
not_wide:
if ((dev->id[c][i].devtype == 0x00) || (dev->id[c][i].devtype == 0x07) ||
((dev->id[c][i].devtype == 0x05) && ((n & 0x10) != 0))) {
m = 1;
m = m << i;
if ((dev->async[c] & m) != 0) {
goto set_sync;
}
}
continue;
set_sync:
if (dev->sp[c][i] == 0x02) {
synu[4]=0x0c;
synuw[4]=0x0c;
} else {
if (dev->sp[c][i] >= 0x03) {
synu[4]=0x0a;
synuw[4]=0x0a;
}
}
tmport = wkport + 0x1b;
j = 0;
if ((m & dev->wide_id[c]) != 0) {
j |= 0x01;
}
outb(j, tmport);
tmport = wkport + 0x03;
outb(satn[0], tmport++);
outb(satn[1], tmport++);
outb(satn[2], tmport++);
outb(satn[3], tmport++);
outb(satn[4], tmport++);
outb(satn[5], tmport++);
tmport += 0x06;
outb(0, tmport);
tmport += 0x02;
outb(dev->id[c][i].devsp, tmport++);
outb(0, tmport++);
outb(satn[6], tmport++);
outb(satn[7], tmport++);
tmport += 0x03;
outb(satn[8], tmport);
tmport += 0x07;
while ((inb(tmport) & 0x80) == 0x00)
cpu_relax();
tmport -= 0x08;
if ((inb(tmport) != 0x11) && (inb(tmport) != 0x8e)) {
continue;
}
while (inb(tmport) != 0x8e)
cpu_relax();
try_sync:
j = 0;
tmport = wkport + 0x14;
outb(0x06, tmport);
tmport += 0x04;
outb(0x20, tmport);
tmport += 0x07;
while ((inb(tmport) & 0x80) == 0) {
if ((inb(tmport) & 0x01) != 0) {
tmport -= 0x06;
if ((m & dev->wide_id[c]) != 0) {
if ((m & dev->ultra_map[c]) != 0) {
outb(synuw[j++], tmport);
} else {
outb(synw[j++], tmport);
}
} else {
if ((m & dev->ultra_map[c]) != 0) {
outb(synu[j++], tmport);
} else {
outb(synn[j++], tmport);
}
}
tmport += 0x06;
}
}
tmport -= 0x08;
while ((inb(tmport) & 0x80) == 0x00)
cpu_relax();
j = inb(tmport) & 0x0f;
if (j == 0x0f) {
goto phase_ins;
}
if (j == 0x0a) {
goto phase_cmds;
}
if (j == 0x0e) {
goto try_sync;
}
continue;
phase_outs:
tmport = wkport + 0x18;
outb(0x20, tmport);
tmport += 0x07;
while ((inb(tmport) & 0x80) == 0x00) {
if ((inb(tmport) & 0x01) != 0x00) {
tmport -= 0x06;
outb(0x00, tmport);
tmport += 0x06;
}
cpu_relax();
}
tmport -= 0x08;
j = inb(tmport);
if (j == 0x85) {
goto tar_dcons;
}
j &= 0x0f;
if (j == 0x0f) {
goto phase_ins;
}
if (j == 0x0a) {
goto phase_cmds;
}
if (j == 0x0e) {
goto phase_outs;
}
continue;
phase_ins:
tmport = wkport + 0x14;
outb(0x06, tmport);
tmport += 0x04;
outb(0x20, tmport);
tmport += 0x07;
k = 0;
phase_ins1:
j = inb(tmport);
if ((j & 0x01) != 0x00) {
tmport -= 0x06;
mbuf[k++] = inb(tmport);
tmport += 0x06;
goto phase_ins1;
}
if ((j & 0x80) == 0x00) {
goto phase_ins1;
}
tmport -= 0x08;
while ((inb(tmport) & 0x80) == 0x00);
j = inb(tmport);
if (j == 0x85) {
goto tar_dcons;
}
j &= 0x0f;
if (j == 0x0f) {
goto phase_ins;
}
if (j == 0x0a) {
goto phase_cmds;
}
if (j == 0x0e) {
goto phase_outs;
}
continue;
phase_cmds:
tmport = wkport + 0x10;
outb(0x30, tmport);
tar_dcons:
tmport = wkport + 0x14;
outb(0x00, tmport);
tmport += 0x04;
outb(0x08, tmport);
tmport += 0x07;
while ((inb(tmport) & 0x80) == 0x00)
cpu_relax();
tmport -= 0x08;
j = inb(tmport);
if (j != 0x16) {
continue;
}
if (mbuf[0] != 0x01) {
continue;
}
if (mbuf[1] != 0x03) {
continue;
}
if (mbuf[4] == 0x00) {
continue;
}
if (mbuf[3] > 0x64) {
continue;
}
if (mbuf[4] > 0x0e) {
mbuf[4] = 0x0e;
}
dev->id[c][i].devsp = mbuf[4];
if (mbuf[3] < 0x0c){
j = 0xb0;
goto set_syn_ok;
}
if ((mbuf[3] < 0x0d) && (rmb == 0)) {
j = 0xa0;
goto set_syn_ok;
}
if (mbuf[3] < 0x1a) {
j = 0x20;
goto set_syn_ok;
}
if (mbuf[3] < 0x33) {
j = 0x40;
goto set_syn_ok;
}
if (mbuf[3] < 0x4c) {
j = 0x50;
goto set_syn_ok;
}
j = 0x60;
set_syn_ok:
dev->id[c][i].devsp = (dev->id[c][i].devsp & 0x0f) | j;
#ifdef ED_DBGP
printk("dev->id[%2d][%2d].devsp = %2x\n",c,i,dev->id[c][i].devsp);
#endif
}
tmport = wkport + 0x16;
outb(0x80, tmport);
}
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